A modular architecture for dynamic programming and maximum likelihood sequence estimation
- 24 March 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 11, 357-360
- https://doi.org/10.1109/icassp.1986.1169069
Abstract
The communication problems of phase tracking [1-3], convolutional decoding [4,5], and dynamic time warping [6], can all be solved with a Dynamic Programming algorithm to find the shortest path through a graph. We present a modular systolic architecture for the specific problem of forming the maximum a posteriori (MAP) estimate of the sequence of visited states of an M-state Markov chain, using noisy observations of a memoryless function of the chain. The architecture is composed of three main sections: (1) a Metric Processor which pre-processes each input datum into M input metrics, (2) a Likelihood Processor which uses the input metrics and the apriori Markov model to update the likelihood measures of the M implicit survivor paths, and (3) a Path Processor which stores the array of back-pointers used to explicitly construct the single most likely survivor path. The likelihood processor is composed of a systolic ring of M simple processing elements which perform the O(M2) computations for each input in O(M) time. If the length N of the sequence is long, the pipe-lined path processor can implement sub-optimal periodic path truncation decoding, which includes the familiar fixed-lag and fixed-interval decoding.Keywords
This publication has 12 references indexed in Scilit:
- Design framework for systolic-type arraysPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- A modular architecture for dynamic programming and maximum likelihood sequence estimationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- VLSI Array processorsIEEE ASSP Magazine, 1985
- Completely-pipelined architectures for digital signal processingIEEE Transactions on Acoustics, Speech, and Signal Processing, 1983
- Aspects of dynamic programming in signal and image processingIEEE Transactions on Automatic Control, 1981
- Optimizing synchronous systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Memory Management in a Viterbi DecoderIEEE Transactions on Communications, 1981
- A dynamic programming algorithm for simultaneous phase estimation and data decoding on random-phase channelsIEEE Transactions on Information Theory, 1981
- The viterbi algorithmProceedings of the IEEE, 1973
- Error bounds for convolutional codes and an asymptotically optimum decoding algorithmIEEE Transactions on Information Theory, 1967