Fault Detection in Iterative Logic Arrays
- 1 May 1971
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-20 (5) , 524-535
- https://doi.org/10.1109/t-c.1971.223286
Abstract
Kautz has studied the problem of testing one-and two-dimensional arrays of combinational cells under the assumptions that all cell inputs must be applied to a cell to test it completely and that a fault in a cell may cause any arbitrary change in its outputs. In this paper we study the same problem under a more restricted set of assumptions: 1) all faults in a cell can be detected by a known set of inputs (usually smaller than the set of all inputs); and 2) each fault will affect the cell outputs in a known manner. Necessary and sufficient conditions for detection of faults in one-dimensional arrays are obtained. A procedure for deriving efficient tests for one-dimensional arrays is presented. Sufficient conditions for the testability of two-dimensional arrays and procedures for constructing tests for some arrays are obtained.Keywords
This publication has 2 references indexed in Scilit:
- Testing for faults in combinational cellular logic arraysPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1967
- Iterative Arrays of Logical CircuitsPublished by MIT Press ,1961