Abstract
An intense worldwide research-and-development effort has been undertaken during the last seven years with the objective of developing thin-film deposition techniques and materials-integration and processing strategies capable of realizing a commercially viable solid-state nonvolatile-ferroelectric-random-access-memory (NVFRAM) technology. Many laboratories around the world have focused their work on developing strategies for integrating submicron thin-film ferroelectric capacitors with the mature silicon-based transistor technology to yield capacitor-transistor-based memory architectures as schematically illustrated in Figure 1. This figure also shows the perovskite unit cell of a capacitor, based on a ferroelectric Pb(ZrxTi 1−xO3 (PZT) layer, and the variety of structural, chemical, electronic, and ionic interfaces that arise during the fabrication and integration of these metal-oxide hetero-structure capacitors on a Si substrate. Nonvolatile ferroelectric random-access memories exploit the capacity of the ferroelectric layer to be polarized in two opposite directions, which are used as the 0 and 1 binary stable states.

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