Advanced semicustom design and fabrication at the Institute for Microelectronics Stuttgart
- 13 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 223-228
- https://doi.org/10.1109/ugim.1989.37340
Abstract
The authors describe the development of the CMOS GATE FOREST design and fabrication environment. They discuss the advantages of a semicustom solution, the advanced design tools that are being developed, the fabrication process including the application of an electron beam direct write-on-wafer machine, and the subsequent test process. To highlight the capabilities and the use of the GATE FOREST, two industrial research projects and two student (master thesis) projects are discussed. The industrial projects have a complexity of more than 120 K active transistors and present state-of-the-art VLSI/ULSI design applications. The student projects, which cover a period of six to eight months, include the design, fabrication, and test of sample circuits.<>Keywords
This publication has 2 references indexed in Scilit:
- New directions in semicustom arraysIEEE Journal of Solid-State Circuits, 1988
- The CMOS gate forest: an efficient and flexible high-performance ASIC design environmentIEEE Journal of Solid-State Circuits, 1988