Channel mobility enhancement in InP metal-insulator-semiconductor field-effect transistors

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Abstract
The channel mobility of the InP metal-insulator-semiconductor field-effect transistor (MISFET’s) was enhanced by incorporating a phosphorus-rich interfacial oxide between the SiO2 gate dielectric and InP substrate. This phosphorus-rich oxide was grown using an indirect, plasma-enhanced chemical vapor deposition process followed by deposition of the SiO2 gate dielectric using the same technique. The metal-insulator-semiconductor structures, formed by aluminum deposition on the SiO2, did not exhibit any hysteresis in its capacitance-voltage characteristic. An interface state density as low as 8×1010 cm−2 eV−1 was achieved for such an MIS system. A channel mobility of 3450 cm2/Vs at room temperature was achieved for 4-μm gate length InP MISFET’s. These MISFET’s did not show any significant drift of channel current during six hours of continuous operation. These excellent characteristics are postulated to result from suppression of surface defects during the deposition of the SiO2 gate dielectric.