Switch-level simulation using dynamic graph algorithms
- 1 March 1991
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 10 (3) , 346-355
- https://doi.org/10.1109/43.67788
Abstract
No abstract availableKeywords
This publication has 14 references indexed in Scilit:
- Fibonacci heaps and their uses in improved network optimization algorithmsJournal of the ACM, 1987
- Fully Dynamic Switch-Level Simulation of CMOS CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Network Partitioning and Ordering for MOS VLSI CircuitsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- A Switch-Level Model and Simulator for MOS Digital SystemsIEEE Transactions on Computers, 1984
- A Responsive Distributed Routing Algorithm for Computer NetworksIEEE Transactions on Communications, 1982
- Signal Delay in RC Tree NetworksPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- A correctness proof of a topology information maintenance protocol for a distributed computer networkCommunications of the ACM, 1977
- Efficient Algorithms for Shortest Paths in Sparse NetworksJournal of the ACM, 1977
- A Shortest Path Algorithm for Edge-Sparse GraphsJournal of the ACM, 1976
- Implementation and efficiency of Moore-algorithms for the shortest route problemMathematical Programming, 1974