The Prime Memory System for Array Access
- 1 May 1982
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-31 (5) , 435-442
- https://doi.org/10.1109/tc.1982.1676020
Abstract
In this paper we describe a memory system designed for parallel array access. The system is based on the use of a prime nwnber of memories and a powerful combination of indexing hardware and data alignment switches. Particular emphasis is placed on the indexing equations and their implementation.Keywords
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