An efficient algorithm for analysis of non-orthogonal layout
- 13 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 12 references indexed in Scilit:
- Extracting simple but accurate RC models for VLSI interconnectPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A Scanline Data Structure Processor for VLSI Geometry CheckingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Goalie: A Space Efficient System for VLSI Artwork AnalysisIEEE Design & Test of Computers, 1985
- Computational GeometryPublished by Springer Nature ,1985
- Magic's Circuit ExtractorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1985
- Inductive Fault Analysis of MOS Integrated CircuitsIEEE Design & Test of Computers, 1985
- Magic: A VLSI Layout SystemPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- EXCL: A Circuit Extractor for IC DesignsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984
- An O (N log N) Algorithm for Boolean Mask OperationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1981
- Algorithms for Reporting and Counting Geometric IntersectionsIEEE Transactions on Computers, 1979