Symmetric CMOS in fully-depleted silicon-on-insulator using P/sup +/-polycrystalline SiGe gate electrodes
- 30 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 01631918,p. 727-730
- https://doi.org/10.1109/iedm.1993.347210
Abstract
In this work, polycrystalline SiGe gate electrodes have been implemented on fully-depleted silicon-on-insulator with light channel doping. Symmetric NMOS and PMOS operation is achieved, with threshold voltages in the range of 0.4-0.6 V. The devices exhibit good short-channel behavior and near-ideal subthreshold slope. CMOS ring oscillators with enhancement-mode NMOS and PMOS have been fabricated, exhibiting propagation delays comparable to previously reported values for fully-depleted SOI.Keywords
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