Automatic test point insertion for pseudo-random testing
- 1 January 1991
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1960-1963 vol.4
- https://doi.org/10.1109/iscas.1991.176793
Abstract
No abstract availableKeywords
This publication has 7 references indexed in Scilit:
- A pragmatic approach to the design of self-testing circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Force-observe, a new design for testability approach (CMOS VLSI circuits)Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- CrossCheck: a cell based VLSI testability solutionPublished by Association for Computing Machinery (ACM) ,1989
- Circular self-test path: a low-cost BIST techniquePublished by Association for Computing Machinery (ACM) ,1987
- Test-point condensation in the diagnosis of digital circuitsProceedings of the Institution of Electrical Engineers, 1977
- Test Point Placement to Simplify Fault DetectionIEEE Transactions on Computers, 1974
- On Modifying Logic Networks to Improve Their DiagnosabilityIEEE Transactions on Computers, 1974