16.7 fA/cell tunnel-leakage-suppressed 16 Mb SRAM for handling cosmic-ray-induced multi-errors

Abstract
A 16 Mb SRAM based on an electric-field-relaxed scheme and an alternate error checking and correction architecture for handling cosmic-ray-induced multi-errors is realized in 0.13 /spl mu/m CMOS technology. The IC has a 16.7 fA/cell standby current, a cell size of 2.06 /spl mu/m/sup 2/ and a 99.5% smaller SER.

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