Ultimate-Speed Adders

Publisher Website

1 April 1963

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electronic Computers

Vol. EC-12 (2) , 142-148
https://doi.org/10.1109/PGEC.1963.263433

Abstract

No abstract available

Keywords

This publication has 5 references indexed in Scilit:

Skip Techniques for High-Speed Carry-Propagation in Binary Arithmetic Units
IEEE Transactions on Electronic Computers, 1961
High-Speed Arithmetic in Binary Computers
Proceedings of the IRE, 1961
An Evaluation of Several Two-Summand Binary Adders
IRE Transactions on Electronic Computers, 1960
Conditional-Sum Addition Logic
IEEE Transactions on Electronic Computers, 1960
A One-Microsecond Adder Using One-Megacycle Circuitry
IEEE Transactions on Electronic Computers, 1956