Design issues for very-long-instruction-word VLSI video signal processors

This publication has 10 references indexed in Scilit:

• High-performance crossbar interconnect for a VLIW video signal processor
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Memory chip for 24-port global register file
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• VLSI issues in memory-system design for video signal processors
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Processing element design for programmable video signal processors
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A 1.5 ns 32 b CMOS ALU in double pass-transistor logic
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1993
• An all-ASIC implementation of a low bit-rate video codec
  IEEE Transactions on Circuits and Systems for Video Technology, 1992
• Instruction-Level Parallel Processing
  Science, 1991
• A 500 MHz microprocessor with a very long instruction word architecture
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1990
• Array architectures for block matching algorithms
  IEEE Transactions on Circuits and Systems, 1989
• A microprogrammable real-time video signal processor (VSP) for motion compensation
  IEEE Journal of Solid-State Circuits, 1988