A high Q on-chip Cu inductor post process for Si integrated circuits
- 20 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 239-241
- https://doi.org/10.1109/iitc.1999.787132
Abstract
A technique has been developed to add high Q inductors to conventional silicon integrated circuits as a post processing step. The inductors are formed by copper plating over a low k dielectric layer of polyimide. An electroless copper deposition technique is used with a plating guide providing a simple method of producing high quality patterned metal. Inductors with a peak Q as high as 17 at a frequency of 2 GHz have been fabricated.Keywords
This publication has 7 references indexed in Scilit:
- Spiral and solenoidal inductor structures on silicon using Cu-damascene interconnectsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Substrate noise coupling through planar spiral inductorIEEE Journal of Solid-State Circuits, 1998
- On-chip spiral inductors with patterned ground shields for Si-based RF ICsIEEE Journal of Solid-State Circuits, 1998
- Suspended SOI structure for advanced 0.1-μm CMOS RF devicesIEEE Transactions on Electron Devices, 1998
- Analysis, design, and optimization of spiral inductors and transformers for Si RF ICsIEEE Journal of Solid-State Circuits, 1998
- Simulation of Electroless Deposition of Cu Thin Films for Very Large Scale Integration MetallizationJournal of the Electrochemical Society, 1997
- The modeling, characterization, and design of monolithic inductors for silicon RF IC'sIEEE Journal of Solid-State Circuits, 1997