Degradation of I/O devices due to ESD-induced dislocations
- 17 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 01631918,p. 459-462
- https://doi.org/10.1109/iedm.1994.383369
Abstract
Degradation in leakage current characteristics of I/O circuits due to ESD events has been studied. TEM observations revealed the generation of crystalline defects in the silicon substrate such as dislocations induced by ESD stress which increased the reverse leakage current level of the p-n junctions in the I/O circuits. We found that current crowding occurs in the silicon surface region during an ESD event resulting in defect generation. We also show that optimal impurity profiles for protection devices can avoid such current crowding and hence the leakage current degradation.<>Keywords
This publication has 2 references indexed in Scilit:
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- Characterization and modeling of second breakdown in NMOST's for the extraction of ESD-related process and design parametersIEEE Transactions on Electron Devices, 1991