Transistor Schottky-barrier-diode integrated logic circuit
- 1 February 1969
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 4 (1) , 3-12
- https://doi.org/10.1109/JSSC.1969.1049946
Abstract
A new high-speed low-power logic circuit using Schottky barrier diodes to avoid saturation of bipolar transistors is described. An experiment using discrete devices and a theoretical calculation show the possibility of subnanosecond logic using a saturated-type transistor logic circuit. A theoretical comparison with CML shows a 2:1 advantage in the speed-power product. The compatibility of Schottky barrier diode with monolithic silicon integrated circuit processing is shown. A prototype TTL circuit is described. Experimental results are given.Keywords
This publication has 2 references indexed in Scilit:
- Integrated Schottky-diode clamp for transistor storage time controlProceedings of the IEEE, 1968
- Reduction of the storage time of a transistor using a Schottky-barrier diodeProceedings of the IEEE, 1967