A current-controlled latch sense amplifier and a static power-saving input buffer for low-power architecture
- 1 April 1993
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 28 (4) , 523-527
- https://doi.org/10.1109/4.210039
Abstract
No abstract availableThis publication has 6 references indexed in Scilit:
- A 100 MHz macropipelined CISC CMOS microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A 200 MHz 64 b dual-issue CMOS microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A three-million-transistor microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A 0.5-W 64-kilobyte snoopy cache memory with pseudo two-port operationIEEE Journal of Solid-State Circuits, 1991
- Two novel power-down circuits on the 1Mb CMOS SRAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1988
- A 20ns 64K CMOS SRAMPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984