An 8-MHz CMOS subranging 8-bit A/D converter
- 1 December 1985
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 20 (6) , 1138-1143
- https://doi.org/10.1109/jssc.1985.1052451
Abstract
A 8-bit subranging converter (ADC) has been realized in a 3-/spl mu/m silicon gate, double-polysilicon capacitor CMOS process. The ADC uses 31 comparators and is capable of conversion rates to 8 MHz at V/SUB DD/=5 V. Die size is 3.2/spl times/2.2 mm/SUP 2/.Keywords
This publication has 2 references indexed in Scilit:
- A high-speed 7 bit A/D converterIEEE Journal of Solid-State Circuits, 1979
- Monolithic expandable 6 bit 20 MHz CMOS/SOS A/D converterIEEE Journal of Solid-State Circuits, 1979