Abstract
The operation of bistable phase‐locked single‐electron tunneling logic elements is analyzed using a deterministic model of single‐electron tunneling. The elements consist of capacitively coupled junctions pumped by an ac signal at twice the tunneling frequency and activated by clocking the dc bias. Logic states are defined by the tunneling phase with respect to the ac pump. The bistable operation is examined over ranges of input phase, clock phase, capacitive coupling factor, dc bias, and ac pump amplitude. Useful operating ranges are determined for stable locking and control of the logic state by input signals, and the signal transfer between coupled stages is examined. It is shown that operation is possible with reasonable input phase margins over wide ranges in dc bias and pump amplitude and for parameter ranges compatible with extremely low power‐delay products. Circuit architectures for exploiting the attractive power‐delay performance and extremely high gate density possible with this approach are discussed.