Concurrent test generation and design for testability
- 13 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- An economical scan design for sequential logic test generationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- The BACK algorithm for sequential test generationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A directed search method for test generation using a concurrent simulatorIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
- Designing circuits with partial scanIEEE Design & Test of Computers, 1988