The BACK algorithm for sequential test generation
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- 6 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
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This publication has 8 references indexed in Scilit:
- SPLIT circuit model for test generationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- On the Acceleration of Test Generation AlgorithmsIEEE Transactions on Computers, 1983
- An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic CircuitsIEEE Transactions on Computers, 1981
- Controllability/observability analysis of digital circuitsIEEE Transactions on Circuits and Systems, 1979
- EBT: A Comprehensive Test Generation Technique for Highly Sequential CircuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1978
- A Nine-Valued Circuit Model for Test GenerationIEEE Transactions on Computers, 1976
- A Heuristic Algorithm for the Testing of Asynchronous CircuitsIEEE Transactions on Computers, 1971
- Programmed Algorithms to Compute Tests to Detect and Distinguish Between Failures in Logic CircuitsIEEE Transactions on Electronic Computers, 1967