A fault tolerance analysis of a neocognitron model serving for network hardware implementation

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Abstract
The authors use empirical statistical methods to obtain preliminary knowledge about the fault tolerant capabilities of a small-scale forward connected neocognitron. The research was performed in order to develop an analytical basis for neural network hardware implementation. Several new fault models are assumed: connection weights stuck at zero or random values; and element output values or connection weight values fluctuating within a certain range about the correct values. Based on these fault models, test shells were simulated to study the neocognitron fault tolerant ability during its learning phase and post-learning phase performance. The result of this study shows that the neocognitron will, to a certain extent, tolerate faults in its post-learning performance phase and ignore the faults in its learning phase. Suggestions for hardware design of the neocognitron from a fault tolerant point of view are provided Author(s) Xu, Q. Dept. of Electr. Eng., Virginia Univ., Charlottesville, VA, USA Inigo, R.M.

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