Partitioning of VLSI circuits and systems
- 24 August 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 50 references indexed in Scilit:
- Hardware/software partitioning using integer programmingPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A gradient method on the initial partition of Fiduccia-Mattheyses algorithmPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A new k-way partitioning approach for multiple types of FPGAsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Linear decomposition algorithm for VLSI design applicationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A NEW LAYOUT DESIGN SYSTEM FOR MULTICHIP MODULESInternational Journal of High Speed Electronics and Systems, 1995
- A fast and robust network bisection algorithmIEEE Transactions on Computers, 1995
- A replication cut for two-way partitioningIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1995
- Multiple FPGA Partitioning with Performance OptimizationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1995
- Optimum clustering for delay minimizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1995
- Partitioning very large circuits using analytical placement techniquesPublished by Association for Computing Machinery (ACM) ,1994