Symbolic layout for rapid full-custom prototyping of high-speed telecommunications chips

This publication has 6 references indexed in Scilit:

• A 30 MHz programmable CMOS video FIR filter and correlator
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Extending an FET layout verification system to bipolar technology
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• CMOS VLSI Applications in Broadband Circuit Switching
  IEEE Journal on Selected Areas in Communications, 1987
• Using CAD Tools in the Design of CRISP
  IEEE Design & Test of Computers, 1987
• TOPOLOGIZER: An Expert System Translator of Transistor Connectivity to Symbolic Cell Layout
  IEEE Journal of Solid-State Circuits, 1985
• Virtual Grid Symbolic Layout
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,1981