Thin-film silicon-on-sapphire deep depletion MOS transistors

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Abstract
This paper describes thin-film MOS transistors in which the entire silicon film forms the conducting channel, not just the surface inversion layer. Single crystal silicon which is epitaxially deposited on sapphire to a thickness of 0.5 to 2.0 microns forms the channel of the field-effect transistor. The oxidations for the channel oxide were done in both steam and dry oxygen ambients resulting in very little oxide charge (0-2 × 1011cm-2) on both [111] and [100] silicon orientations. No orientation dependence was observed. The absence of an active substrate leads to device characteristics that are significantly different from MOS transistors made on thick silicon. Analysis of the output characteristics and the C-V curve of these devices enables one to study the characteristics of the silicon film and its two surfaces. It is shown that the silicon-sapphire interface region has similar characteristics to the silicon-silicon dioxide interface region in its tendency to support donor sites after heating in hydrogen. To facilitate analysis of the C-V curve, two interesting relations are derived: specifically, the slope of the curve is related to the doping density of the silicon, and the 0.95 level on the normalized curve is shown to be offset approximately one volt from flat-band potential regardless of oxide thickness or doping density, provided these parameters set the normalized flat-band capacitance significantly below 0.95. The use of thin high resistivity p-type films allows one to fabricate p-type enhancement transistors which exhibit a low threshold voltage due to the fact that the silicon surface does not have to be inverted before the channel conducts. Finally, partial-gate deep depletion transistors are examined and it is shown that a substantial increase in drain breakdown voltage may be obtained with thiss geometry.

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