Design of a switch for network on chip applications

This publication has 9 references indexed in Scilit:

• A network on chip architecture and design methodology
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• Interconnect IP node for future system-on-chip designs
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
• An improved analytical model for wormhole routed networks with application to butterfly fat-trees
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• A low-latency FIFO for mixed-clock systems
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Networks on chips: a new SoC paradigm
  Computer, 2002
• The future of wires
  Proceedings of the IEEE, 2001
• Route packets, net wires
  Published by Association for Computing Machinery (ACM) ,2001
• Performance evaluation of switch-based wormhole networks
  IEEE Transactions on Parallel and Distributed Systems, 1997
• Fat-trees: Universal networks for hardware-efficient supercomputing
  IEEE Transactions on Computers, 1985