Ultra-high-speed digital circuit performance in 0.2- mu m gate-length AlInAs/GaInAs HEMT technology
- 1 September 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 9 (9) , 482-484
- https://doi.org/10.1109/55.6952
Abstract
The fabrication of fifteen-stage ring oscillators and static flip-flop frequency dividers with 0.2- mu m gate-length AlInAs/GaInAs HEMT technology is described. The fabricated HEMT devices within the circuits demonstrated a g/sub m/ transconductance of 750 mS/mm and a full-channel current of 850 mA/mm. The measured cutoff frequency of the device is 120 GHz. The shortest gate delay measured for buffered-FET-logic (BFL) ring oscillators at 300 K was 9.3 ps at 66.7 mW/gate (fan-out=1); fan-out sensitivity was 1.5 ps per fanout. The shortest gate delay measured for capacitively enhanced logic (CEL) ring oscillators at 300 K was 6.0 ps at 23.8 mW/gate (fan-out=1) with a fan-out sensitivity of 2.7 ps per fan-out. The CEL gate delay reduced to less than 5.0 ps with 11.35-mW power dissipation when measured at 77 K. The highest operating frequency for the static dividers was 26.7 GHz at 73.1 mW and 300 K.Keywords
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