Quaternary threshold logic full-adder circuit with complementary inputs†
- 25 April 1984
- journal article
- research article
- Published by Taylor & Francis in International Journal of Electronics
- Vol. 56 (4) , 539-545
- https://doi.org/10.1080/00207218408938846
Abstract
The characteristics of an integrated complementary-input quaternary threshold logic full-adder are presented and discussed. This adder is similar to designs previously reported, except that complementary inputs are required, and complementary outputs are produced. Increased speed, and improved immunity to the undesirable consequences of fabrication tolerances and circuit noise are benefits obtained, at the cost of the increased device and signal line counts necessary to accommodate the complement signalsKeywords
This publication has 4 references indexed in Scilit:
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- Threshold I/sup 2/L and its applications to binary symmetric functions and multivalued logicIEEE Journal of Solid-State Circuits, 1977