Threshold I/sup 2/L and its applications to binary symmetric functions and multivalued logic
- 1 October 1977
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 12 (5) , 463-472
- https://doi.org/10.1109/JSSC.1977.1050939
Abstract
I/SUP 2/L threshold gate using current mirrors providing weighting of inputs, summation, and comparison with a threshold is described and its practical realization is discussed. Application to binary symmetric functions shows significant area savings over standard I/SUP 2/L implementation. A complete multivalued logic family, using a four-level I/SUP 2/L threshold logic technique is introduced.Keywords
This publication has 4 references indexed in Scilit:
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- An integrated m-out-of-n detection circuit using threshold logicIEEE Journal of Solid-State Circuits, 1974
- Engineering aspects of multi-valued logic systemsComputer, 1974
- An integrated threshold gatePublished by Institute of Electrical and Electronics Engineers (IEEE) ,1967