Direct tunneling current model for circuit simulation
- 22 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 7 references indexed in Scilit:
- Ultra-thin gate oxides-performance and reliabilityPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Physical oxide thickness extraction and verification using quantum mechanical simulationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- CMOS scaling into the nanometer regimeProceedings of the IEEE, 1997
- 1.5 nm direct-tunneling gate oxide Si MOSFET'sIEEE Transactions on Electron Devices, 1996
- Determination of tunnelling parameters in ultra-thin oxide layer poly-Si/SiO2/Si structuresSolid-State Electronics, 1995
- Hole injection SiO/sub 2/ breakdown model for very low voltage lifetime extrapolationIEEE Transactions on Electron Devices, 1994
- MOSFET Models for VLSI Circuit SimulationPublished by Springer Nature ,1993