A global optimization approach for architectural synthesis

Publisher Website

4 December 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/iccad.1990.129896

Abstract

No abstract available

Keywords

This publication has 5 references indexed in Scilit:

Algorithms for hardware allocation in data path synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
Force-directed scheduling for the behavioral synthesis of ASICs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
A new polynomial-time algorithm for linear programming
Combinatorica, 1984
A Formal Method for the Specification, Analysis, and Design of Register-Transfer Level Digital Logic
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1983
On the facial structure of set packing polyhedra
Mathematical Programming, 1973