Threshold and punchthrough behavior of laterally nonuniformally doped short-channel MOSFET's
- 1 July 1983
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 30 (7) , 776-782
- https://doi.org/10.1109/T-ED.1983.21209
Abstract
Predictions of gate threshold voltage and punchthrough voltage have been made for short-channel VDMOS and UMOS field-effect transistors using exact, two-dimensional numerical analysis. In these devices the doping concentration varies laterally from source to drain. The threshold voltage is found to be related to the maximum value of channel doping. This correspondence becomes poorer as the channel length is diminished since punchthrough current begins to influence the threshold voltage for short-channel devices. Surface punch-through is predicted for the VDMOSFET whereas bulk punchthrough is found in the UMOS device. A correspondence between the results of two-dimensional computer simulation of punchthrough and the estimations of one-dimensional simplified theory is found.Keywords
This publication has 8 references indexed in Scilit:
- MINIMOS—A two-dimensional MOS transistor analyzerIEEE Transactions on Electron Devices, 1980
- Nonplanar VLSI device analysis using the solution of Poisson's equationIEEE Transactions on Electron Devices, 1980
- UMOS transistors onIEEE Transactions on Electron Devices, 1980
- Modeling of the on-resistance of LDMOS, VDMOS, and VMOS power transistorsIEEE Transactions on Electron Devices, 1980
- VLSI limitations from drain-induced barrier loweringIEEE Transactions on Electron Devices, 1979
- Short-channel MOSFET's in the punchthrough current modeIEEE Transactions on Electron Devices, 1979
- A numerical model of avalanche breakdown in MOSFET'sIEEE Transactions on Electron Devices, 1978
- Drain voltage limitations of MOS transistorsSolid-State Electronics, 1974