Abstract
We present several extensions of the effect–cause analysis method [1] for fault diagnosis in combinational circuits. First, we extend the analysis to circuits consisting of interconnected modules that are assumed to be internal fault-free. To handle the situation in which the obtained response is incompatible with a fault domain restricted to the I/O pins of modules, we introduce a hierarchical approach that repeats the analysis, every time with a suspected module replaced by its gate model, while the rest of the circuit remains modeled at the module level.