A new procedure for weighted random built-in self-test
Top Cited Papers
- 4 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 660-669
- https://doi.org/10.1109/test.1990.114081
Abstract
It is proposed that a pseudorandom sequence and a single weighted random sequence be used to implement built-in self-test (BIST) efficiently in a large integrated scan circuit which would otherwise need an excessive pseudorandom test length. A method of determining the weight set and the approximate pseudorandom and weighted random test lengths, based on fast fault simulation tools, is suggested. By modifying specific scan cells, the BIST hardware conditionally generates the weighted stream locally, at specific input sites. A weighted control signal is used to regulate the proportion of weighted and pseudorandom inputs. Apart from determining that, in the cases examined, one weight set was sufficient for a notable decrease in test time, it was also noticed that a very coarse weight set (i.e. restricting biases to 0, 0.25, 0.5, 0.75, and 1) provides acceptable results. Using finer resolution within the weight set usually results in a slightly higher coverage, but at the expense of a much higher area overhead.<>Keywords
This publication has 11 references indexed in Scilit:
- Low cost testing of high density logic componentsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Hardware-based weighted random pattern generation for boundary scanPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Fault detection effectiveness of weighted random patternsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Multiple distributions for biased random test patternsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A new procedure for weighted random built-in self-testPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A method to calculate necessary assignments in algorithmic test pattern generationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Cellular automata-based pseudorandom number generators for built-in self-testIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
- Testability-Driven Random Test-Pattern GenerationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Some experimental results from random testing of microprocessorsIEEE Transactions on Instrumentation and Measurement, 1986
- The Weighted Random Test-Pattern GeneratorIEEE Transactions on Computers, 1975