The effect of drain offset on current-voltage characteristics in sub micron polysilicon thin-film transistors
- 1 January 1996
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices
- Vol. 43 (8) , 1306-1308
- https://doi.org/10.1109/16.506785
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- Degradation of polysilicon TFTs during dynamic stressPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Activation energy of source-drain current in hydrogenated and unhydrogenated polysilicon thin-film transistorsIEEE Transactions on Electron Devices, 1990
- Characteristics of offset-structure polycrystalline-silicon thin-film transistorsIEEE Electron Device Letters, 1988