Design methodology for low-voltage MOSFETs

This publication has 3 references indexed in Scilit:

• Sub-50 nm gate length n-MOSFETs with 10 nm phosphorus source and drain junctions
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• 0.1 mu m CMOS devices using low-impurity-channel transistors (LICT)
  Published by Institute of Electrical and Electronics Engineers (IEEE) ,2002
• Temperature-Scaling Theory for Low-Temperature-Operated MOSFET with Deep-Submicron Channel
  Japanese Journal of Applied Physics, 1988