An architectural co-synthesis algorithm for distributed, embedded computing systems
- 1 June 1997
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Vol. 5 (2) , 218-229
- https://doi.org/10.1109/92.585225
Abstract
Many embedded computers are distributed systems, composed of several heterogeneous processors and communication links of varying speeds and topologies. This paper describes a new, heuristic algorithm which simultaneously synthesizes the hardware and software architectures of a distributed system to meet a performance goal and minimize cost. The hardware architecture of the synthesized system consists of a network of processors of multiple types and arbitrary communication topology; the software architecture consists of an allocation of processes to processors and a schedule for the processes. Most previous work in co-synthesis targets an architectural template, whereas this algorithm can synthesize a distributed system of arbitrary topology. The algorithm works from a technology database which describes the available processors, communication links, I/O devices, and implementations of processes on processors. Previous work had proposed solving this problem by integer linear programming (ILP); our algorithm is much faster than ILP and produces high-quality results.Keywords
This publication has 22 references indexed in Scilit:
- Design and implementation of a robot control system using a unified hardware-software rapid-prototyping frameworkPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- TigerSwitch: a case study in embedded computing system designPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A path-based technique for estimating hardware runtime in HW/SW-cosynthesisPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Hardware-software co-design of embedded systemsProceedings of the IEEE, 1994
- Hardware-software cosynthesis for microcontrollersIEEE Design & Test of Computers, 1993
- Hardware-software cosynthesis for digital systemsIEEE Design & Test of Computers, 1993
- Declustering: a new multiprocessor scheduling techniqueIEEE Transactions on Parallel and Distributed Systems, 1993
- Automating the design of computer systemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1993
- Applying compiler techniques to scheduling in real-time systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1990
- Multiprocessor Scheduling with the Aid of Network Flow AlgorithmsIEEE Transactions on Software Engineering, 1977