A 100-MHz 4-Mb cache DRAM with fast copy-back scheme
- 1 January 1992
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Journal of Solid-State Circuits
- Vol. 27 (11) , 1534-1539
- https://doi.org/10.1109/4.165333
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- A 100 MHz 4 Mb cache DRAM with fast copy-back schemePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A circuit design of intelligent CDRAM with automatic write back capabilityPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1990