Effects of coercive voltage and charge injection on memory windows of metal-ferroelectric-semiconductor and metal-ferroelectric-insulator-semiconductor gate structures

We have prepared ${\mathrm{Pt/SrBi}}_2{\mathrm{Ta}}_2{\mathrm{O}}_9$ (SBT)/Si metal-ferroelectric-semiconductor (MFS) and ${\mathrm{Pt/SBT/Y}}_2{\mathrm{O}}_3/\mathrm{Si}$ metal-ferroelectric-insulator-semiconductor (MFIS) ferroelectric gate structures and investigated the changes in memory window with different thickness of SBT and ${\mathrm{Y}}_2{\mathrm{O}}_3$ in the MFS and MFIS. As a result, it is found that the memory window increases with increasing thickness of SBT and decreasing thickness of ${\mathrm{Y}}_2{\mathrm{O}}_3.$ The experimental and theoretical analysis reveals that the memory window equals to the difference between the effective coercive voltage ${\text{(2V}}_c)$ applied to the ferroelectric film and the flat band voltage shift due to charge injection ${\mathrm{(V}}_{\mathrm{ci}}\mathrm{).}$ Increasing the thickness of SBT, the ${\text{2V}}_c$ seems to be saturated at higher voltage, whereas the $V_{\mathrm{ci}}$ starts to increase exponentially at the higher gate voltage. In contrast, the $V_{\mathrm{ci}}$ decreases with decreasing thickness of ${\mathrm{Y}}_2{\mathrm{O}}_3,$ resulting in the enhancement of the memory window due to the reduction of charge injection.