An Analysis of the Modes of Operation of Parasitic SCRs
Open Access
- 1 January 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Nuclear Science
- Vol. 28 (6) , 4288-4291
- https://doi.org/10.1109/tns.1981.4335714
Abstract
Four-layer parasitic SCR paths exist in bulk CMOS integrated circuits which can be activated by transient ionizing radiation, by overvoltage stress, and by other means into a low-impedance state (latch-up). These parasitic SCRs often have characteristics which are not explained by simple SCR theory; for example, large holding voltage offsets and saturation of the total current through the device have been observed. This paper analyzes a cross-coupled transistor model to explain how these characteristics can occur in parasitic four-layer paths. Experimental data is presented demonstrating modes of operation present in parasitic SCRs but not normally observed in discrete Shockley diodes or thyristors.Keywords
This publication has 5 references indexed in Scilit:
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