Design of neural network systems from custom analog VLSI chips
- 4 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1098-1101
- https://doi.org/10.1109/iscas.1990.112305
Abstract
No abstract availableKeywords
This publication has 8 references indexed in Scilit:
- Neural circuits for programmable analog MOS VLSI implementationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- An analog MOS implementation of the synaptic weights for feedback neural netsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- An analog MOS implementation of the synaptic weights for feedforward/feedback neural netsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A model of neural circuits for programmable VLSI implementationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Some properties of dynamic feedback neural netsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Analog VLSI Implementation of Neural SystemsPublished by Springer Nature ,1989
- Design of parallel hardware neural network systems from custom analog VLSI 'building block' chipsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1989
- Simple 'neural' optimization networks: An A/D converter, signal decision circuit, and a linear programming circuitIEEE Transactions on Circuits and Systems, 1986