Thermal modeling and experimental characterization of the C4/surface-mount-array interconnect technologies
- 1 March 1995
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part A
- Vol. 18 (1) , 87-93
- https://doi.org/10.1109/95.370740
Abstract
No abstract availableKeywords
This publication has 4 references indexed in Scilit:
- A hi-density C4/CBGA interconnect technology for a CMOS microprocessorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Controlled collapse chip connection (C4)-an enabling technologyPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- theta /sub jc/ characterization of chip packages-justification, limitations, and futureIEEE Transactions on Components, Hybrids, and Manufacturing Technology, 1989
- Package thermal resistance model: dependency on equipment designIEEE Transactions on Components, Hybrids, and Manufacturing Technology, 1988