A computer-aided design model for high-voltage double diffused MOS (DMOS) transistors

Abstract

High-voltage double diffused metal-oxide semiconductor transistors (DMOST's) have been fabricated with drain-source breakdown voltage greater than 200 V. This paper describes an experimental and theoretical study of the current-voltage behavior of these devices leading to a two-component MOS field effect transistor (MOSFET)-resistor model appropriate for computer-aided circuit design. The effects of velocity saturation, mobility reduction, and nonuniform impurity concentration in the channel, and of spreading resistance in the drift region are considered. Parameter extraction for experimentally characterizing these effects is described. Comparison of experimental and theoretical results shows that the model accurately predicts the device I/V characteristics. The range of validity of the model is limited primarily by high current saturation effects.

Keywords

This publication has 8 references indexed in Scilit:

Avalanche breakdown in high-voltage D-MOS devices
IEEE Transactions on Electron Devices, 1976
An experimental and theoretical analysis of double-diffused MOS transistors
IEEE Journal of Solid-State Circuits, 1975
Threshold voltage controllability in double-diffused-MOS transistors
IEEE Transactions on Electron Devices, 1974
Modelling of the double-diffused MOST's with self-aligned gates
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1972
D-MOS transistor for microwave applications
IEEE Transactions on Electron Devices, 1972
Hot Electron Effects and Saturation Velocities in Silicon Inversion Layers
Journal of Applied Physics, 1970
On the effect of mobility variation on MOS device characteristics
Proceedings of the IEEE, 1968
Carrier mobility and current saturation in the MOS transistor
IEEE Transactions on Electron Devices, 1965