Multiple Fault Testing of Large Circuits by Single Fault Test Sets
- 1 November 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. C-30 (11) , 855-865
- https://doi.org/10.1109/tc.1981.1675716
Abstract
A general theory is presented in this paper to quantitatively predict the multiple fault coverage capability of single fault detection test sets in combinational circuits. The theory is unique in that it provides greatest lower bounds on the coverage capability of all possible circuits of concern by a simple table-look-up process. All the results known so far in this area are seen to be special cases of the theory. The more important contribution of the theory, however, is seen in its predictions made for reconvergent internal fan-out circuits. Most unexpectedly, the multiple fault coverage of such circuits by single fault test sets is discovered to be extremely precarious. Such results clearly have alarming implications in LSI and VLSI testing.Keywords
This publication has 11 references indexed in Scilit:
- Multiple fault testing of large circuits by single fault test setsIEEE Transactions on Circuits and Systems, 1981
- Generic Fault Characterizations for Table Look-Up Coverage BoundingIEEE Transactions on Computers, 1980
- Diagnosis & Reliable Design of Digital SystemsPublished by Springer Nature ,1976
- On the Design of Logic Networks with Redundancy and Testability ConsiderationsIEEE Transactions on Computers, 1974
- Redundancy Testing in Combinational NetworksIEEE Transactions on Computers, 1974
- A New Representation for Faults in Combinational Digital CircuitsIEEE Transactions on Computers, 1972
- Multiple Fault Detection in Combinational NetworksIEEE Transactions on Computers, 1972
- A Nand Model ror Fault Diagnosis in Combinational Logic NetworksIEEE Transactions on Computers, 1971
- Fault Equivalence in Combinational Logic NetworksIEEE Transactions on Computers, 1971
- On the Design of Multiple Fault Diagnosable NetworksIEEE Transactions on Computers, 1971