Local memory exploration and optimization in embedded systems
- 1 January 1999
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 18 (1) , 3-13
- https://doi.org/10.1109/43.739054
Abstract
No abstract availableThis publication has 22 references indexed in Scilit:
- Definition And Solution Of The Memory Packing Problem For Field-programmable SystemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- Size-constrained code placement for cache miss rate reductionPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Library mapping for memoriesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A memory selection algorithm for high-performance pipelinesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- 1995 high level synthesis design repositoryPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Code placement techniques for cache miss rate reductionACM Transactions on Design Automation of Electronic Systems, 1997
- A task-level hierarchical memory model for system synthesis of multiprocessorsPublished by Association for Computing Machinery (ACM) ,1997
- Application-driven synthesis of core-based systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1997
- Automatic partitioning of parallel loops and data arrays for distributed shared-memory multiprocessorsIEEE Transactions on Parallel and Distributed Systems, 1995
- Program optimization for instruction cachesPublished by Association for Computing Machinery (ACM) ,1989