A memory selection algorithm for high-performance pipelines
- 19 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableThis publication has 9 references indexed in Scilit:
- Exact evaluation of memory size for multi-dimensional signal processing systemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- An algorithm for array variable clusteringPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Post-processor for data path synthesis using multiport memoriesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Interconnect optimisation during data path allocationPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A memory selection algorithm for high-performance pipelinesPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Application-Driven Architecture SynthesisPublished by Springer Nature ,1993
- REAL: a program for REgister ALlocationPublished by Association for Computing Machinery (ACM) ,1987
- Automated Synthesis of Data Paths in Digital SystemsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1986
- The MIMOLA Design System: Tools for the Design of Digital ProcessorsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1984