Inverter performance of deep-submicrometer MOSFETs
- 1 December 1988
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Electron Device Letters
- Vol. 9 (12) , 633-635
- https://doi.org/10.1109/55.20419
Abstract
Switching delay measurements are reported for self-aligned, almost fully scaled, liquid-nitrogen-temperature operation NMOS inverters with deep-submicrometer gate lengths. The shortest delay per stage of 13.1 ps was measured in 0.1- mu m gate-length circuits. Circuit simulations based on the measured device characteristics show that still shorter delay times can be reached with such a technology.Keywords
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