1.65 Gb/s 60 mW 4:1 multiplexer and 1.8 Gb/s 80 mW 1:4 demultiplexer ICs using 2 V 3-level series-gating ECL circuits
- 19 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
No abstract availableKeywords
This publication has 3 references indexed in Scilit:
- 3. Ogb/s, 272mw, 8:1 Multiplexer And 4.1gb/s, 388mw, 1:8 DemultiplexerPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2005
- 2V low-power bipolar logicPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Design techniques for low-voltage high-speed digital bipolar circuitsIEEE Journal of Solid-State Circuits, 1994