Adaptive bandwidth DLLs and PLLs using regulated supply CMOS buffers
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- 7 November 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A technique for designing DLLs and PLLs using CMOS buffers with a regulated supply is presented. By scaling the charge pump current and the output resistance of the regulating amplifier, the proposed loops achieve a wide bandwidth that tracks the operating frequency, a constant damping factor, large operating range and low noise sensitivity. Prototype loops designed in 0.35-pm CMOS processes exhibit >lox operating range and less than 1%~ input tracking jitter.Keywords
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