Abstract
Electronic packaging is increasingly becoming a vital part of the electronics industry, representing a key barrier to cost reduction and performance improvement. Of all the packaging methods, flip‐chip technology offers, up to now, the highest packaging density and best electrical performance. In this paper, flip‐chip test design considerations, process development and driving forces for adhesive joining and soldering flip‐chip processes will be given. Reliability test results of flip‐chip interconnection technology using conductive adhesive joining will also be presented. The electrical contact nature of the adhesive joint will be elaborated in the light of continuous and static electrical resistance measurement. Future research work directions in flip‐chip joining using eutectic solder and conductive adhesives on flexible circuits will also be discussed.

This publication has 7 references indexed in Scilit: